Electrical circuits require a return path to operate. In a printed circuit board (“PCB”), a predictable, well defined return path ensures proper operation. A poorly defined return path can be the cause for a range of issues from poor signal quality and performance to electromagnetic interference (“EMI”) radiation to complete board failure. These issues can be random in nature and difficult to debug. Discontinuities in the return path can increase current loops leading to EMI problems and possible compliance failure with regulatory limits. There is no effective, full-board screening analysis capability available today. Existing approaches rely on either geometric checks or full-wave simulation. Geometric checks are reasonable from a performance aspect for full-board screening but cannot accurately model or simulate the actual return path. Full-wave solvers can be used to accurately model and determine return path current but are extremely compute-resource intensive making them impractical for analyzing a complete layout.